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CD22M3493
Data Sheet January 1997 File Number
2491.4
12 x 8 x 1 BiMOS-E Crosspoint Switch
[ /Title () /Subject () /Autho () /Keyords ) /Cretor () /DOCI FO dfark
The Intersil CD22M3493 is an array of 96 analog switches capable of handling signals from DC to video. Because of the switch structure, input signals may swing through the total supply voltage range, VDD to VSS. Each of the 96 switches may be addressed via the ADDRESS input to the 7 to 96 line decoder. The state of the addressed switch is established by the signal to the DATA input. A low or logic zero input will open the switch, while a high logic level or a one will result in closure of the addressed switch when the STROBE input goes high from its normally low state. Any number or combination of connections may be active at one time. Each connection, however, must be made or broken individually in the manner previously described. All switches may be reset by taking the RESET input from a zero state to a one state and then returning it to its normal low state.
Features
* 96 Analog Switches * Low RON * Guaranteed RON Matching * Analog Signal Input Voltage Equal to the Supply Voltage * Wide Operating Voltage . . . . . . . . . . . . . . . . . . . 4V to 16V * Parallel Input Addressing * High Latch Up Current . . . . . . . . . . . . . . . . . . 50mA (Min) * Very Low Crosstalk * Pin and Functionally Compatible with the Following Types: SGS M3493, SGS M093, SSI 78A093A, and Mitel MT8812
Applications
* PBX Systems * Instrumentation
Ordering Information
PART NUMBER TEMP. RANGE (oC) -40 to 85 -40 to 85 PACKAGE 40 Ld PDIP 44 Ld PLCC PKG. NO.
* Analog and Digital Multiplexers
/Pageode /Useutines /DOCIEW dfark
CD22M3493E CD22M3493Q
E40.6 N44.65
* Video Switching Networks
Block Diagram
STROBE DATA RESET V DD 1 AX0 AX1 AX2 AX3 AY0 AY1 AY2 1
7 TO 96 DECODER 96
LATCHES 96
12 X 8 SWITCH ARRAY
X0 - X11
V SS
Y0 - Y7
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
CD22M3493
Absolute Maximum Ratings
DC Supply Voltage (VDD) (Referenced to VSS . . . . . . . -0.5V to 17V Supply Voltage Range For TA = Full Package Temperature Range VSS = 0V, VDD 4V to 16V DC Input Diode Current, IIN For VI < VSS -0.5V or VI > VDD +0.5V . . . . . . . . . . . . . . . . 20mA DC Output Diode Current, IOK For VO < VSS -0.5V or VO > VDD +0.5V . . . . . . . . . . . . . . 20mA DC Transmission Gate Current . . . . . . . . . . . . . . . . . . . . . . . 25mA Power Dissipation Per Package (Po) For TA = -40oC to 85oC (PDIP) . . . . . . . . . . . . . . . . . . . . .500mW For TA = -40oC to 85oC (PLCC) . . . . . . . . . . . . . . . . . . . . .600mW
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) Plastic DIP Package. . . . . . . . . . . . . . . . . . . . . . . . . 55 PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Maximum Junction Temperature Plastic . . . . . . . . . . . . . . . . .150oC Maximum Storage Temperature Range (TSTG). . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC (PLCC - Lead Tips Only)
Operating Conditions
Temperature Range (TA) Package Type E and Q. . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC DC Input or Output Voltage . . . . . . . . . . . . . Min = VSS , Max = VDD Digital Input Voltage . . . . . . . . . . . . . . . . . . . Min = VSS , Max = VDD
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER Supply Current
TA = -40oC to 85oC, VSS = 0V, VDD = 14V, Unless Otherwise Specified SYMBOL IDD TEST CONDITIONS VDD = 5V, Logic Inputs = VDD VDD = 16V, Logic Inputs = VDD MIN 2.4 Reset = Low (Note 2) TYP MAX 2 5 0.8 10 (Note 3) UNITS mA mA V V A
High-Level Input Voltage Low-Level Input Voltage Input Leakage Current, Digital
VIH VIL IIN
Electrical Specifications
PARAMETER STATIC CROSSPOINTS ON Resistance
TA = -40oC to 85oC, VSS = 0V, VDD = 14V, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
RON
TA = 25oC, VIN = VDD/2 VX - VY = 0.25V TA = -40oC to 85oC VIN = VDD/2 VX - VY = 0.25V
VDD = 5V VDD = 14V VDD = 5V VDD = 14V
-
40 22 4 -
70 45 80 55 10 10 10 (Note 3)
A
ON Resistance
RON
Difference in ON Resistance Between Any Two Switches Difference in ON Resistance Between Any Two Switches OFF-State Leakage Current
RON RON IL
TA = 25oC, VIN = VDD/2 VX - VY = 0.25V, VDD = 14V TA = -40oC to 85oC, VIN = VDD/2 VX - VY = 0.25V, VDD = 14V |VX - VY| = 14V
Electrical Specifications
TA = 25oC, VSS = 0V, VDD = 14V, CL = 50pF, Unless Otherwise Specified TEST CONDITIONS MIN TYP MAX UNITS
PARAMETER DYNAMIC CROSSPOINTS Switch I/O Capacitance Switch Feedthrough Capacitance Propagation Delay Time (Switch ON) Signal Input to Output, tPHL or tPLH
VIN = 7V, f = 1MHz VIN = 7V, f = 1MHz
-
20 0.2 30
100
pF pF ns
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CD22M3493
Electrical Specifications
TA = 25oC, VSS = 0V, VDD = 14V, CL = 50pF, Unless Otherwise Specified (Continued) TEST CONDITIONS CL = 3pF, RL = 75, VIN = 2VP-P VIN = 2VP-P, f = 1kHz VIN = 2VP-P, f = 1kHz 40dB 110dB Control Crosstalk DATA-Input, ADDRESS, or STROBE to Output VIN = 2VP-P, RL = 75 VIN = 2VP-P, RL = 1k || 10pF Control Input = 3VP-P Square Wave, tR = tF = 10ns RIN = 1K, ROUT = 10k || 10pF MIN TYP 50 MAX UNITS MHz
PARAMETER Frequency Response Channel ON f = 20log (VX/VY) = -3dB Total Harmonic, THD Feedthrough Channel OFF Feedthrough = 20log (VX/VY) = FDT Frequency for Signal Crosstalk, fCT Attenuation of:
-
0.01 -95
-
% dB
-
10 5 75
-
MHz kHz mVPEAK
Electrical Specifications
PARAMETER DYNAMIC CONTROLS Digital Input Capacitance Propagation Delay Time STROBE to Output Switch Turn-ON Switch Turn-OFF DATA-IN to Output Turn-ON to High Level Turn-ON to Low Level ADDRESS to Output Turn-ON to High Level Turn-OFF to Low Level Setup Time DATA-IN to STROBE ADDRESS to STROBE Hold Time STROBE to DATA-IN STROBE to ADDRESS Pulse Width STROBE RESET
TA = 25oC, VSS = 0V, VDD = 14V, RL = 1k || 50pF, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
CIN
VIN = 5V, f = 1MHz
-
5
-
pF
tPSN tPSF
-
30 40
100 100
ns ns
tPZH tPZL
-
30 30
100 100
ns ns
tPAN tPAF
-
30 25
100 100
ns ns
tDS tAS
20 20
-
-
ns ns
tDH tAH
20 10
-
-
ns ns
tSPW tRPW tPHZ
30 50 -
100
200
ns ns ns
RESET Turn-OFF to Output Delay NOTES: 2. Reset IIH < 2mA, Reset = VDD = 16V. 3. At 25oC Limit is 100nA.
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CD22M3493 Timing Diagram
ADDRESS 50% 50%
tAS STROBE
tSPW 50%
tAH
tPSN tPSF tDH
tDS DATA 50%
50% tRPW
RESET tPAF tPZL SWITCH OUTPUT tPZH tPAN 10% 90%
50% tPHZ
50%
90%
TRUTH TABLE X AXIS X ADDRESS AX3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 AX2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 AX1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 AX0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 4 4 4 4 NOTE X SWITCH X0 X1 X2 X3 X4 X5 No Connect No Connect X6 X7 X8 X9 X10 X11 No Connect No Connect AY2 0 0 0 0 1 1 1 1
TRUTH TABLE Y AXIS Y ADDRESS AY1 0 0 1 1 0 0 1 1 AY0 0 1 0 1 0 1 0 1 Y SWITCH Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
NOTE: 4. When X switch addresses are in these states, no change in status will occur in switches between any X and Y points.
To make a connection (close switch) between any two points, specify an ``X'' address, a ``Y'' address, set ``DATA'' high, and switch ``Strobe'' from low to high. To break a connection, follow this same procedure with ``DATA'' low.:
X ADDRESS Example: DATA AX3 0 1 0 AX2 0 0 0 AX1 1 0 1 AX0 1 0 1 AY2 1 1 1 Y ADDRESS AY1 0 1 0 AY0 0 1 0
To connect switch X3 to switch Y4: To connect switch X6 to switch Y7: To break connection from X3 to Y4:
1 1 0
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CD22M3493 Pin Descriptions
SYMBOL 40 LEAD PDIP PIN NO. 44 LEAD PLCC PIN NO. DESCRIPTION
POWER SUPPLIES VDD VSS ADDRESS AX0 - AX3 AY0 - AY2 CONTROL DATA STROBE 38 18 42 20 DATA Input determines the state of the addressed switch. A high or one will close the switch. A low or zero will open the switch. STROBE Input enables the action defined by the DATA and ADDRESS Inputs. A low or zero results in no action. The ADDRESS Input must be stable before the STROBE Input goes to the active high level. The DATA Input must be stable on the failing edge of the STROBE. MASTER RESET. A high or one on this line opens all switches. 5, 22, 23 and 4 24, 25 and 2 5, 24, 25 and 4 26, 27 and 2 X Address Lines. These pins select one of the 12 rows of switches. See the Truth Table for the valid addresses. Y Address Lines. These pins select one of the 8 columns of switches. See the Truth Table for the valid addresses. 40 20 44 22 Positive Supply Negative Supply
RESET INPUTS/OUTPUTS X0 - X5 I/O X6 - X11 Y0 - Y7 I/O
3
3
33 - 28 8 - 13
37 - 32 9 - 14
Analog or Digital Inputs/Outputs. These pins are the rows X0 - X11.
35, 37, 39, 1, 21, 19, 17 and 15
40, 41, 43, 1, 23, 21, 19 and 18
Analog or Digital Inputs/Outputs. These pins are the columns Y0 - Y7.
Pinouts
CD22M3493 (PDIP) TOP VIEW
Y3 1 AY2 RESET 2 3 40 VDD AX0 AX3 NC 39 Y2 38 DATA 37 Y1 36 NC 35 Y0 34 NC 33 X0 32 X1 31 X2 30 X3 29 X4 28 X5 27 NC 26 NC 25 AY1 24 AY0 23 AX2 22 AX1 21 Y4 18 19 20 21 22 23 24 25 26 27 28 Y7 Y6 Y5 STROBE Y4 AX1 AX2 AY0 VSS AY1 NC NC NC X6 7 8 9
CD22M3493 (PLCC) TOP VIEW
RESET
VDD
DATA
AY2
Y3
Y2
Y1
AX3 4 AX0 5 NC NC 6 7
6
5
4
3
2
1
44 43 42 41 40
Y0 39 NC 38 NC 37 X0 36 X1 35 X2 34 X3 33 X4 32 X5 31 NC 30 NC 29 NC
X6 8 X7 9 X8 10 X9 11 X10 12 X11 13 NC 14 Y7 15 NC 16 Y6 17 STROBE 18 Y5 19 VSS 20
X7 10 X8 11 X9 12 X10 13 X11 14 NC 15 NC 16 NC 17
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CD22M3493
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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